Saturday 30 June, 1-5PM: FPGA Workshop #1 - build & simulate a RISC CPU design

The first FPGA Intro talk was well received, which prompted @sjdavies to put some hard work into creating a “software-only” (BYO laptop) workshop running 30 June, 1-5PM. You’ll create a RISC processor based on Atmel AVR - simulated in software, so no physical FPGA development board is required.

The workshop content can be found at GitHub - makehackvoid/fpga-sig: FPGA Special Interest Group

PREREQUISITE: You will need to come with a laptop and a working Xilinx Vivado design Suite - HLx Editions installation! Part of what makes FPGA development annoying is the software required to develop them: so please follow the software registration and installation directions at:

Please don’t delay this until the day of the workshop: if you get stuck please ask for help here and we’ll get everything sorted beforehand so that everyone can spend the afternoon learning the workshop content instead of clicking through boring installation problems :slight_smile:

Discussions and planning on the content of the workshop can be found at: