Hi all,
Tonight Eyal, Ryan and myself had a long discussion re FPGA development.
Eyal has bought himself a cheap Spartan 6 based board, ~$30 or so. I purchased a different board with the same FPGA but less circuitry for much the same. See http://www.chinaqmtech.com/. They offer two Spartan 6 boards, mine is the cheaper, only has 32Mb of SDRAM. Both boards require a JTAG programmer, an additional cost. Spartan 6 is older technology and uses a legacy tool chain.
http://www.digilentinc.com has nice boards but a little more expensive. Cheapest is the CMod S7, a Spartan 7 on a very small, breadboardable layout. Very minimal but does have a built in programmer. Uses the Vivado tool chain, the current offering.
You can dive into FPGAs without spending anything and just download Vivado to play in the simulator. No cost.
My suggestion is Verilog over VHDL, particularly if you know C. Most recent digital logic texts include examples in one or the other, sometimes both. An excellent author is Pong Chu, an American professor. He has written two books with the same topics, one in Verilog, the other in VHDL.
In my experience the barrier for most people getting into FPGAs is finding an interesting and new application that canāt be done easier in a microcontroller/SBC.
It no doubt worth considering the Lattice offering these days as well. They make smaller and usually easier to deal with parts. Of course thereās also the open source tool chain for certain parts as well now.
Iāve also have in the mail a Spartan 6 board with SDRAM, probably the same as the one youāve got. Looking at the Xilinx IP available, thereās no Single Data Rate SDRAM controller available for S6, only DDR. Have you found a controller to work with this board?
Hi,
I bought the SDRAM board purely because it was cheaper and I want to give my apple2fpga project a permanent home. Right now the Apple 2 lives on my Digilent Spartan 3 dev board which needs to be reassembled and reprogrammed every time I want to play.
The projects memory needs are completely satisfied by the fpga block ram resources, the SDRAM is unneeded.
As far as āinteresting and new application that canāt be done easier in a microcontroller/SBCā goes, I think for some things the novelty of just doing it on an FPGA can be worth the barrier to entry. Perhaps not always, but thereās a difference between, say, an Apple II emulator running on a Pi and one on an FPGA that behaves as the original hardware did, and may even be compatible, to an extent, with the original hardware.
After last night I stayed up late reading on all sorts of shenanigans, and while it pains me to think just how ill informed and naive I was less than 24 hours ago, the appeal of FPGAās is really starting to grow on me. Iād argue the barrier to entry may not be that people cannot think of projects to do on them that would not be simpler on an SBC, but that they may not understand just how flexible FPGAās really are.
Perhaps that flexibility may scare people, āinfinite possibilitiesā doesnāt exactly give you the slap in the right direction that āYouāve got 32k of program space and 2k of RAM, just write as many blinking LEDās as you can until itās fullā does.
Iād say it was the lack of apparent, well, not constraints, but perhaps structure that scared me away from FPGAās at first, but now I know itās not quite as bad as I probably psyched myself into thinking it was.
Iāll chuck in here a recommendation for those getting started, check out the nandland youtube channel. It obviously a work in progress, but he has some of the most clear and practical explanations of things like crossing clock domains that are super helpful to learn early on if you intend on interfacing within anything.
I had a stickybeak through, I wonāt say itās surprisingly simple, I will say that itās much more refined than any of the messes Iāve ended up making, however.
Whilst a logic analyser is a reasonable project, you have to admit, a bit like building a VGA interface or any of the other standard learning projects, thereās very good cheap logic analysers available off the shelf.
If fact unless you interface the SDRAM, youād probably be better off hooking up the ChipScope IP (xilinx term, but Altera or Lattice have an equivalent.)
As an alternative with similar level of complexity, I reckon you could make a low spec/feature version of one of these https://www.joulescope.com/ Personally I think itās just a matter of time before a cheap open source alternative comes out. Iād love to see a $20-30 design that you could have made by one of the PCB assembly services on-demand.
I have been playing with a Haasoscope based on the Altera Max 10, has been alot of fun as an O-scope but also does 8ch at 250MSPs logic analyzer through matplot for visualisation and command - being open-source so the implementation is all there, I can bring it along one wednesday.
@Harvs I hear you. I selected this project as a simple one for me to learn to use the tools and the language.
BTW, the joulescope is still $800. I need to run a test that lasts a few months (my 2nd test is running now) and I am getting good results with the INA219 (soon INA226). I am also experimenting with the tiny eZ430-F2013. It should run using less than 1mA (It measured 440uA when doing a busy wait) and has a 16-bit ADC so should cover 5uA-300mA which is all I need.
Yes, please bring it in.
I looked at this project before and thought the small recording depth is an issue. I use a humble Rigol DS1074Z and regularly take a single shot then spend time drilling into the detail.
