EPROM Burner/Flasher to revive a C64

Hey folks,

I recently acquired a rather unhappy commodore 64 (black screen, has video carrier but nothing more) and was wondering whether anyone has (or if the space has) a tool to flash a 27C512? I have one on order and I’m hoping to use it as a replacement for my probably dead PLA chip

If someone has a working C64 and is willing to test my chips I’d be over the moon as currently my only option is to speculate and blindly replace chips until it works.


Hi Max,
have a universal programmer handy, should be able to flash a 27C512.

Also have a logic analyser so can help look at post reset signals to see where things break down.

Have you checked al the power rails, i.e. got a solid 5/12 volts etc?
Have you probed the cpu clock? I donated a 'scope a few months back, perfect for that job.

I may have a schematic for the original C64, brown case version, around here somewhere.


Hey Steve,

Awesome, are you going to be around for the pi jam on Saturday? I don’t know if it’ll arrive in time so will let you know on Friday. (Should be wednesday, but aus post is having a lot of trouble as of late)

Yup rails are solid after recapping the power section of the board. I got my own DSO :grin: Reset line is fine. CPU clock is .8/.9 MHz something which apparently is normal for a PAL C64.

Address lines A12/A13 have this weird sloping pattern (haven’t checked reddit yet where I asked about it)

It’s all good I found a schematic for my revision on line :smiley: though was only able to find the US troubleshooting guide.


Hi Max,
yeah, can probably make it next Sats pi jam.

Weird sloping is normal. The 65xx family are NMOS, so transistor pulling low, resistor pulling high. See how the H to L transition is sharp and vertical? That’s the NMOS transistor pulling down. The L to H transition is an RC exponential, the R component being supplied by the chips internal tie high resistor, the C component by the PCB traces and gate inputs of any attached logic.

Don’t forget that the bulk of the circuitry will be using TTL levels, so low = 0.8V and high = 2.0V. Time it takes for a rising edge to get to 2V is important, time to get to 5V (or not get to 5V) is not an issue.

I’m curious to see if the computer is actually running and it’s just the video giving problems. I’d be tempted to try entering a one or two line program or command, something simple like beeping the speaker and seeing if it runs.

Okies thanks :smiley:

Hmmm interesting. Stange how there is a mixture of signal levels too.

Yeah I was thinking that too, I am assuming I can just bang in the command and it should work assuming the keyboard is operable

According to this:

the EEPROM idea may work but it’s not always guaranteed due to propagation delay criticality.

your talking to the wrong Steve( crashman39) I run the Jams… I’ll be at the pi jam this Saturday , but the other Steve (sjdavies) maybe there as well LOL

No worries, thanks @crashman39

@sjdavies EPROM arrived today :D, Yeah I was reading about that, something to do with read time being too slow, apparently original chips do around 90us, but some EPROMs can be much much slower than that. The one I got is rated to 45uS so should be OK. I did see somewhere that my board revision is compatable with the EPROM trick so I guess we’ll wait and see :smiley:

And hey if it doesn’t work I’m only out $10 whereis if I got the original part and it wasn’t that I’d be out $50-$100 :slight_smile:

I’m hoping it’s either the PLA or the VIC-II chip, if it’s the other ICs that could be fun (my board only is socketed for CPU, PLA, VIC and SID so looooots of reflow lol)

Thanks, Max

I have a mostly working C64 (Keyboard’s a bit rinky-dink) that I could test chips in.
Not sure how we can get them in the same place though, as can’t really make it to MHV nowadays.

Hi Miles,
is the not being able to make it to MHV a transport issue? I’ll be heading in tomorrow and live just around the corner.


Hi Max,
according to this article: http://propeddle.com/?p=162 the reset vector fetch occurs on the 7th and 8th cycles after the +ve reset edge. The 6 cycle reset is no doubt described in the MOS doco, just buried somewhere.

Ok, think you found this Sat, pg. 40, sec Also Fig 1.13 on pg. 35.